1. Field of the Invention
The present invention relates to logic circuits for performing a parallel logic function by executing a serial logic operation, and in particular, to such logic circuits which perform iterative logic functions.
2. Description of the Related Art
A number of digital logic processes require a parallel processing of multiple logic signals. One example of such a process is "hashing" whereby long, and sometimes variable length, streams of data are transformed into shorter versions thereof. One such common parallel logic operation in hashing is that of performing an EXCLUSIVE-OR function upon multiple parallel signals. Conventionally, this has been done by using a logic gate with multiple parallel inputs or, alternatively, multiple logic gates which are cascaded and have fewer inputs per gate. A problem with such an approach, however, is that a significant amount of circuitry is required. As a result, and of particular concern with respect to integrated circuit implementations, such circuitry often becomes quite large and cumbersome, and uses a significant amount of power.
Accordingly, it would be desirable to have a technique by which parallel logic operations could be performed with significantly less circuit area, thereby reducing the amount of area and power required.